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Hardware · Datacenter

NVIDIA H200 SXM

NVIDIA

Same Hopper compute as the H100 SXM5 with more and faster HBM3e memory. Announced 2023-11; volume shipping in 2024.

×8 over NVLink Compute units 989 TF FP16 4.80 TB/s memory bus 141 GB HBM3e (VRAM)
Datacenter. Bus width tracks bandwidth (4.80 TB/s, sets decode speed); the box tracks capacity (141 GB, sets what fits). Drawn per unit; a typical node is 8×.

Specs

Memory
141 GB HBM3e
Bandwidth
4.80 TB/s
FP16 dense
989 TFLOPS
FP8 dense
1979 TFLOPS
Power
700 W
Form factor
sxm
Interconnect
nvlink
Released
2024-01

What it runs (8× unit, Q4_K_M, 4K context)

Model Fits? Decode ceiling
Llama 3.1 8B Instruct yes ~6866 tok/s
Llama 3.3 70B Instruct yes ~851 tok/s
Qwen 2.5 72B Instruct yes ~827 tok/s
DeepSeek-V3 yes ~1645 tok/s

Ceiling is the theoretical rooflineruntimeA performance model that bounds throughput by either compute or memory bandwidth, whichever is the limiting resource for an operation's arithmetic intensity. Open full entry ; open the explorer to set quant, context, and runtime and see the realistic range.

Sources